1. Field of the Invention
The present invention relates to metal-oxide semiconductor field-effect transistor integrated delay circuits for digital signals and, more particularly to such circuits wherein time delays adjustable in equidistant steps can be produced using an inverter chain consisting of inverters connected in series with respect to the signal flow.
2. Description of the Prior Art
From DE-OS No. 29 28 224 it is known that delay arrangements can be constructed from inverters connected in series with respect to the signal flow, and such arrangements can be used as delay circuits for ring oscillators as are described in DE-OS-No. 29 28 430, for example. The prior art inverter chain consists of alternate series connections of simple static inverters, formed from a switching transistor and a load transistor, and inverters expanded by a pull-up transistor and a bootstrap capacitor. The time delay provided by the prior art arrangement depends on the number of inverters connected in series.
If adjustable time delays are to be obtainable with an inverter chain of this kind as is the case in the present invention, the inverters must be provided with signal output terminals to be selected by means of a selector switch. The time delay is then dependent on the position of the selected output terminal.